Ball grid array packages with thermally conductive containers

ABSTRACT

Ball grid array packages for semiconductor die include a thermally conductive container and a substrate that substantially enclose a semiconductor die. The die is positioned with respect to the container by thermally conductive supports formed in the container or attached to the container. The die contacts the supports so that the die and the container form a cavity that is at least partially filled with a thermally conductive material such as a conductive epoxy to promote thermal conduction between the die and the container. The die electrically connects to the substrate with bond wires that extend through an aperture in the substrate and attach to bond pads provided on the substrate. The aperture is typically filled with a protective layer of resin, epoxy, or other material that also encapsulates the bond wires. Solder balls are provided for electrical connection or the substrate and the die to a circuit board or other circuit element, and an encapsulant layer covers the surface of the substrate but permits electrical connection to the bond pads. Methods for packaging semiconductor die in such packages are also provided.

TECHNICAL FIELD

[0001] The invention pertains to methods and apparatus for packagingelectronic components such as semiconductor die.

BACKGROUND

[0002] The miniaturization of electronic devices such as integratedcircuits continues to drive the costs of electronic products down evenas the performance of these products increases. The development ofimproved lithographic methods and other fabrication processes as well asimproved packaging and circuit interconnection methods have beenimportant factors this trend.

[0003] While improvements in fabrication processes for miniaturizationpermit inexpensive manufacture of ever smaller devices, theinterconnection of smaller devices can be difficult and expensive. Inaddition, the operation of smaller devices presents additionaldifficulties. Such smaller devices frequently are required to perform atleast the same functions as the larger devices that they replace, and inmany cases are expected to perform these functions faster and at a lowercost. A small device that operates at high speeds tends to generatelarge amounts of heat in a smaller volume, and dissipation of this heatis essential to avoid damage to the device so that the device has anacceptable time to failure. Therefore, improved circuit packages andpackaging methods are needed that permit improved heat transfer.

[0004] Another significant problem in the use of integrated circuits ispackaging the integrated circuit in such a way as to electricallyconnect to many, densely spaced input/output electrical connections. Ifthe input/output electrical connections must be spread out to permitelectrical connections to other integrated circuits, other circuits orcircuit components such as printed circuit boards, then much of theadvantage of integrated circuit miniaturization is lost.

[0005] One method of packaging integrated circuits for electricalconnection to a printed circuit board is the so-called ball grid array(BGA) package. A BGA package includes a semiconductor die (an integratedcircuit) that is attached to a substrate. Electrical connections aremade from the die to the substrate with bond wires that are attached tobond pads provided on the die and the substrate. The bond pads on thesubstrate are electrically connected to an array of solder balls orbumps, and these solder balls are used to bond and make electricalconnection to the printed circuit board. BGA packages are described in,for example, Tsuji et al., U.S. Pat. No. 5,930,603, Tsunoda et al., U.S.Pat. No. 5,914,531, and Tsuji et al., U.S. Pat. No. 5,293,072.

[0006] Not only are BGA packages more compact than other packages, BGApackaged devices generally have superior thermal and electricalproperties. The solder balls provide an excellent thermal path for theremoval of heat from the semiconductor die as well as providing lowresistance, low inductance electrical connections. Nevertheless,improved BGA packages that provide even denser interconnections andgreater heat removal are needed.

SUMMARY OF THE INVENTION

[0007] Containers for packaging semiconductor die are provided thatinclude a thermally conductive strip having recesses configured toretain a semiconductor die. The containers may include at least one diestandoff that extends into the recess. The die standoff is configured toprovide a thermally conductive path between the semiconductor die andthe container and fix the standoff distance. In representativeembodiments, the thermally conductive material is a metal such ascopper. In additional embodiments, the containers include a mountingsurface for attaching the container to a substrate and the die standoffis configured so that a substrate attachment surface of thesemiconductor die is substantially coplanar with the mounting surfacewith the die situated on the die standoff.

[0008] Packaged semiconductor die are provided that include a thermallyconductive container bonded to the semiconductor die and a substratebonded to the container. The packaged semiconductor die also include atleast one interconnect that electrically connects the semiconductor dieto the substrate. In further embodiments, a first surface of thesubstrate is bonded to the container and at least one solder bumpprojects from a surface of the substrate opposite the first surface. Instill further embodiments, the packaged semiconductor die include aperimeter seal that encapsulates at least a portion of a perimeter ofthe substrate and a bond cap that encapsulates the interconnect. Inother embodiments, the packaged die include an encapsulant that fills acavity defined by the semiconductor die and the container.

[0009] Integrated circuit assemblies are provided that include asubstrate and a semiconductor die electrically connected to thesubstrate. Solder bumps electrically connect the circuit board to thesubstrate, and the semiconductor die is attached to a thermallyconductive container.

[0010] Packages for semiconductor die are provided that include athermally conductive container defining a recess configured to receive asemiconductor die. The packages include a heat sink attached to thecontainer, and, in representative embodiments, the heat sink and thecontainer are of a unitary one-piece integral construction.

[0011] Methods of removing heat from a circuit assembly are providedthat include providing a container of a thermally conducive material andattaching the semiconductor die to the container with a thermallyconductive layer. A cavity defined by the semiconductor die and thecontainer is filled with a thermally conductive encapsulant. In furtherembodiments, the semiconductor die and the container includes respectivesubstrate mounting surfaces that are selected to be substantiallycoplanar.

[0012] Methods of packaging a semiconductor die include providing athermally conductive container that includes at least one die supportand situating the die at least partially within the container. The dieis secured to the container with a heat conductive layer such as athermally conductive epoxy and the die support is thermally conductive.

[0013] Methods of packaging include mounting a plurality ofsemiconductor die in corresponding cavities formed in a cavity strip;and attaching a substrate strip to the cavity strip. The plurality ofdie are separated by cutting the cavity strip and the substrate stripafter attachment.

[0014] These and other features and advantages of the invention are setforth below with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIGS. 1A-1B are perspective views of an exemplary ball grid arraypackage for a semiconductor die.

[0016]FIG. 1C is a sectional view of the ball grid array package ofFIGS. 1A-1B.

[0017] FIGS. 2A-2B are a perspective view and a sectional view,respectively, illustrating an embodiment of BGA assemblies produced witha container strip and a substrate strip.

[0018]FIG. 3 is a block diagram of a method of packaging semiconductordie in ball grid array package.

[0019] FIGS. 4A-4D are sectional views illustrating alternativecontainers for ball grid array packages.

[0020]FIG. 4E is a perspective view of a form of BGA assembly thatincludes an array of die supports.

DETAILED DESCRIPTION

[0021] With reference to FIGS. 1A-1C, a ball grid array (“BGA”) assembly100 in one form includes a semiconductor die 102 that is partiallyenclosed by a thermally conductive container 104 that attaches to asubstrate 106. The die 102 is typically attached to a die mountingsurface 107 of the substrate 106 with an adhesive layer 108. Thesubstrate 106 may be a multilayer material that includes layers ofconducting and insulating materials. Representative materials includeinsulating circuit board base materials such as polyimide, glass epoxy,and glass fiber layers, as well as conducting layers such as copper, andsolder resist layers. The adhesive layer 108 may be a two part epoxy, athermosetting epoxy, or other adhesive.

[0022] The substrate 106 in this example includes a pattern layer 110(or several pattern layers) and the die 102 is electrically connected tothe pattern layer 110 with bond wires 114 that attach to bond pads 112on the die 102 and the substrate 106. The bond wires 114 generallyconnect to the pattern layer 110 by extending through an aperture 132(referred to as a “wire bond slot”) in the substrate 106. A bond cap 134of an epoxy resin, a cured liquid encapsulant, a molded plastic, orother material covers the bond wires 114 and fills the aperture 132,protecting the bond wires 114, the die 102, and edges of the substrate106. Solder bumps 116 are situated at bond pads 117 provided on asoldering surface 118 of the substrate 106. An encapsulant layer 138seals to the bond cap 134 and covers or partially covers the bond cap134. The solder bumps 116 are generally soldered to the bond pads 117and electrically connected to the pattern layer 110. The solder bumps116 are used in an additional soldering process or processes toelectrically connect the die 102 to a circuit board or other circuitassembly.

[0023] The BGA assembly 100 of the form shown in FIGS. 1A-1C includes amoisture barrier 120 that covers perimeter edges of the substrate 106and the container 104. The illustrated moisture barrier 120 extends tocover an edge region 150 of the substrate 106 and the container 104. Inalternative embodiments, the moisture barrier 120 is omitted or extendsto cover only selected portions of the edge region 150. Referring toFIG. 1C, the die 102 is thermally connected to die supports 122 formedin the container 104. The die supports 122 contact or closely approachthe die 102 to increase thermal conductance from the die 102 to thecontainer 104. The container 104 and the die supports 122 areconveniently formed of a single piece of a thermally conductive materialsuch as copper strip or copper foil, or other heat dissipating or heatabsorbing material. Alternatively, the supports 122 can be fabricatedseparately and then attached to the container 104. The die supports 122may be configured so that a die attach surface 124 of the die 102 issubstantially coplanar with a surface 126 of the container 104 with thedie 102 in contact with the supports 122. As used herein, the surfaces124, 126 are referred to as substantially coplanar if differences inparallelism or offset or other deviations from coplanarity aresufficiently small that a layer of adhesive used to fasten the layers124, 126 can adequately compensate such deviations. The die 102 isgenerally attached to the container 104 such as with a thermallyconductive epoxy or other adhesive that substantially fills a cavity 130defined by the die 102 and the container 104. A thermally conductiveepoxy, other adhesive, or resin may be used to fill a volume 131 definedby the substrate 106 and the container 104 at a perimeter of the die102. The encapsulant layer 138 covers the bond cap 132 and portions of asurface 140 of the substrate 106.

[0024] The semiconductor die 102 and the bond wires 106 in theembodiment of FIGS. 1A-1C are encapsulated by a bond cap 134 that can bemade of a cured liquid encapsulant, a cured epoxy, a molded plastic, acured liquid resin, or other material. In addition, while the container104 includes die standoffs 122, containers without die standoffs can beprovided.

[0025] BGA assemblies such as the BGA assembly 100 of FIGS. 1A-1D mayalso be produced in the form of a BGA assembly strip 200, as illustratedin FIGS. 2A-2B. Semiconductor die 201 a-201 d are mounted (e.g.,adhesively bonded with a thermally conductive adhesive) in respectivecavities 203 a-203 d of containers 204 a-204 d of a container strip 205.The semiconductor die 201 a-201 d generally contact die supports 207provided at each of the cavities 203 a-203 d. A substrate strip 209includes substrates 210 a-210 d that are connected with the bars 211.The substrate strip 209 is attached to the semiconductor die 201 a-201 dand the container strip 205, such as generally with a layer of anadhesive. The substrate strip 209 is aligned with respect to thecontainer strip 205 so that bond wires 212 pass through apertures 214a-214 d and electrically connect the semiconductor die 201 a-201 d torespective substrates 210 a-210 d. FIGS. 2A-2B show four semiconductordie 201 a-201 d attached to the container strip 205, but longer orshorter container strips and substrate strips can be used to mount moreor fewer semiconductor die. After the semiconductor die 201 a-201 d areattached and wire bonded to the container strip 205 and the substratestrip 209, solder bumps (not shown) may be formed on the substrate strip209 in a conventional manner. The substrate strip 209 and containerstrip 205 are then cut, sheared, or routed at the tie bars 211 along cutlines 220 so that the semiconductor die 201 a-201 d are attached torespective substrates 210 a-210 d and containers 204 a-204 d and areavailable as individual BGA assemblies.

[0026]FIG. 3A illustrates one embodiment of a method 300 for packaging asemiconductor chip or die or other circuit element in a ball grid arraypackage such as the package shown in FIGS. 2A-2B. In a step 302, one ormore semiconductor die are mounted in corresponding cavities of acontainer using, for example, a two part epoxy, a thermal epoxy, otherthermally conductive adhesive, or solder. Substrates are attached toeach of the semiconductor die and associated containers in step 306. Thesemiconductor die are wire bonded to the substrates in a step 308 andsolder bumps are formed on the substrates in a step 309. Bond caps areformed in a step 310. For fabrication of BGA assemblies from a containerstrip and a substrate strip, individual BGA assemblies are singulatedfrom an assembled strip in a step 314, and a perimeter seal applied in astep 316.

[0027]FIG. 3B illustrates an alternative method 350. In a step 352, dieare attached to a substrate and in a step 352, the die are wire bondedto a substrate. A container is attached in a step 358, and a wire bondslot is filled with an epoxy or other resin in a step 369. In the step369, a cavity formed by the container, the die, and the substrate isalso partially or completely filled with an epoxy resin or othermaterial. In steps 360, 364, respectively, solder bumps are attached andindividual BGA assemblies are signulated.

[0028] Alternative containers 401-405 are illustrated in FIGS. 4A-4B.The container 401 of FIG. 4A includes a ridged region 411 formed by oneor more die supports 413 that support a semiconductor die 414. Theridges in this example comprise undulations in the base of thecontainer. The die supports 413 are situated so that a die surface 417is approximately parallel and aligned with a plane defined by acontainer mounting surface 419. The die supports 413 are formed in awall 425 (FIG. 4B) of the container 402 but in alternative arrangements,die supports can be formed of an additional layer of thermallyconductive material, such as a copper foil, and attached to a containerby, for example, spot welding or with a thermally conductive adhesive.

[0029] The container 402 of FIG. 4B includes an array of die supports423. The die supports 423 can be provided uniformly or concentrated atregions of the container 402 at which a die generates substantial heat.FIG. 4C illustrates a container 405 that includes die supports 471having spherical, elliptical, or otherwise curved die mounting surfaces473.

[0030] Containers of a foil or other ductile material can be formed bypressing with or into a mold. Other methods of fabrication includemachining and etching. FIG. 4D illustrates a heat dissipating container403 formed with machining operations in a copper strip or plate 432 (orstrip or plate of other thermally conductive, heat absorbing, or heatdissipative material) that includes a cavity 434 configured to retain asemiconductor die 436. Die supports 438 are provided on a surface 440 ofthe cavity 434. The cavity 434 is configured to at least partiallyenclose the semiconductor die 436, and the die supports 438 areconveniently configured so that a bonding surface 456 of the die 436 issubstantially coplanar with a surface 458 of the container 403. FIG. 4Eillustrates a container 404 that includes a heat sink 460, shown in FIG.4E as a series of grooves 462 and ridges 464. The heat sink 460 can, forexample, be formed integrally with the container or can be provided as aseparate piece and bonded to a container with a thermally conductiveepoxy, welding, or other method.

[0031] While the example BGA assemblies described above include solderballs, solder bumps or other solder shapes can be used. As used herein,solder bumps includes solder balls and solder in any other projectingshape, and solder refers to an electrically conducting material thatreflows when heated.

[0032] While the invention is described with respect to particularimplementations, the invention is not limited to these implementations.The invention is directed to novel and non-obvious aspects of thisdisclosure, both individually and in combination as set forth in theclaims below.

We claim:
 1. A container for packaging a semiconductor die, thecontainer comprising a recess defined in a thermally conductivematerial, wherein the recess is configured to retain a semiconductordie.
 2. The container of claim 1, wherein the thermally conductivematerial is a metal.
 3. A container for packaging a semiconductor die,comprising at least one die standoff that extends into a recess definedin the container, wherein the die standoff is configured to provide athermally conductive path between the semiconductor die and thecontainer.
 4. The container of claim 3, wherein the container includes amounting surface for attaching the container to a substrate and the diestandoff is configured so that a surface of the semiconductor die assituated on the die standoff is substantially coplanar with the mountingsurface.
 5. The container of claim 3, wherein the container includes amounting surface for attaching the container to a substrate and the diestandoff is configured so that a surface of the semiconductor die assituated on the die standoff is substantially coplanar with the mountingsurface.
 6. A packaged semiconductor die, comprising: a thermallyconductive container bonded to the semiconductor die; a substrate bondedto the container; and at least one interconnect that electricallyconnects the semiconductor die to the substrate.
 7. The packagedsemiconductor die of claim 6, wherein the container includes at leastone die standoff and the semiconductor die is attached to the thermallyconductive container at the die standoff.
 8. The packaged semiconductordie of claim 6, wherein the substrate is bonded to the container at afirst surface and further comprises at least one solder bump projectingfrom a surface of the substrate opposite the first surface.
 9. Thepackaged semiconductor die of claim 8, further comprising a perimeterseal that encapsulates at least a portion of a perimeter of thesubstrate.
 10. The packaged semiconductor die of claim 6, furthercomprising a bond cap that encapsulates the interconnect.
 11. Thepackaged semiconductor die of claim 6, further comprising an encapsulantthat occupies a cavity defined by the semiconductor die and thecontainer.
 12. The packaged semiconductor die of claim 6, wherein thecontainer includes at least one die standoff and a substrate attachmentsurface, and the semiconductor die is attached to the thermallyconductive container at the die standoff such that a substrate-facingsurface of the semiconductor die is substantially coplanar with thesubstrate attachment surface.
 13. The packaged semiconductor die ofclaim 12, wherein the die standoff is a ridge.
 14. The packagedsemiconductor die of claim 13, further comprising a heat sink attachedto a surface of the container.
 15. The packaged semiconductor die ofclaim 6, further comprising an array of die standoffs and a substrateattachment surface, and the semiconductor die is attached to thethermally conductive container at the die standoffs such that asubstrate-facing surface of the semiconductor die is substantiallycoplanar with the substrate attachment surface.
 16. An integratedcircuit assembly, comprising: a substrate; a semiconductor dieelectrically connected to the substrate; a circuit board; solder bumpsthat electrically connect the circuit board to the substrate; and athermally conductive container attached to the semiconductor die. 17.The integrated circuit assembly of claim 16, further comprising a heatsink attached to the container.
 18. The package of claim 16, wherein thesink and the container are of a unitary one-piece integral construction.19. The package of claim 16, wherein the semiconductor die and thecontainer have respective substrate facing surfaces that aresubstantially coplanar.
 20. A stamp for forming a container for at leastone semiconductor die, the stamp comprising a die support portionconfigured to form a die support.
 21. A method of removing heat from acircuit assembly, the circuit assembly including a semiconductor dieelectrically connected to a substrate, comprising: providing a diecontainer of a thermally conductive material; and attaching thesemiconductor die to the container with a thermally conductive layer.22. The method of claim 21, further comprising filling a cavity definedby the semiconductor die and the container with a thermally conductiveencapsulant.
 23. The method of claim 22, further comprising arrangingcorresponding mounting surfaces of the die and the substrate to besubstantially coplanar.
 24. A method of packaging a die, comprising:providing a thermally conductive container; bonding the die to thecontainer; and situating a heat sink to dissipate heat received by thethermally conductive container.
 25. The method of claim 24, wherein thecontainer and the heat sink are of unitary one piece construction.
 26. Amethod of packaging a semiconductor die, comprising providing athermally conductive container that includes at least one die support;situating the semiconductor die at least partially within the container;and securing the semiconductor die with respect to the container. 27.The method of claim 26, wherein the semiconductor die is secured withrespect to the container at the die support.
 28. A method of packaging,comprising: mounting a plurality of semiconductor die in correspondingcavities formed in a cavity strip; and attaching substrate strip to thecavity strip.
 29. The method of claim 28, further comprising separatingthe plurality of die by cutting the cavity strip and the substrate stripat at least one cut line.
 30. The method of claim 28, wherein thesubstrate strip include substrates corresponding to the cavities andfurther comprising electrically connecting the die to respectivesubstrates.